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888-522-7486 ext. 3012

301-369-2800 ext. 3012

EE-304 - Digital Design I

Minimization of Boolean functions using Kamaugh Maps and Quine-McCluskey Tabulation. Multilevel circuits: PLAs, PALs, gate arrays. Combinational logic design with MSI LSI. Chip count reduction. Sequential circuit analysis and design. State tables and state diagrams. Asynchronous circuit design. Introduction to PAL design software. Students design, simulate and build circuits. Design using programmable devices.  Prerequisite: EL-204.

Class Hours - Lab Hours - Credit Hours: 2-2-3

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